1. Field of the Invention
This invention is related to the field of integrated circuits and, more particularly, to caches in integrated circuits.
2. Description of the Related Art
As the number of transistors included on a single integrated circuit “chip” has increased and as the operating frequency of the integrated circuits has increased, the management of power consumed by an integrated circuit has continued to increase in importance. If power consumption is not managed, meeting the thermal requirements of the integrated circuit (e.g. providing components required to adequately cool the integrated circuit during operation to remain within thermal limits of the integrated circuit) can be overly costly or even infeasible. Additionally, in some applications such as battery powered devices, managing power consumption in an integrated circuit can be key to providing acceptable battery life.
Power consumption in an integrated circuit is related to the supply voltage provided to the integrated circuit. For example, many digital logic circuits represent a binary one and a binary zero as the supply voltage and ground voltage, respectively (or vice versa). As digital logic evaluates during operation, signals frequently transition fully from one voltage to the other. Thus, the power consumed in an integrated circuit is dependent on the magnitude of the supply voltage relative to the ground voltage. Reducing the supply voltage generally leads to reduced power consumption. However, there are limits to the amount by which the supply voltage can be reduced.
Reducing the supply voltage often reduces the performance of the circuits supplied by that supply voltage. If some circuits in the integrated circuit are busy (and thus need to perform at or near peak operation), the supply voltage must generally remain at a relatively high level. One technique to avoid this is to divide the integrated circuit into voltage “domains” that are supplied by separate supply voltages that can be independently adjusted. That is, the supply voltage for circuits in a given voltage domain is the corresponding supply voltage. Thus, some voltages can be reduced (or even powered down completely) while others remain high for full speed operation.
One limit to the reduction of supply voltage that is experienced in integrated circuits that integrate memories (such as SRAM) is related to the robustness of the memory. As supply voltage decreases below a certain voltage, the ability to reliably read and write the memory decreases. The reduced reliability has several sources. The resistances of some devices in the memory (e.g. the pass gate transistors that couple bit lines to memory cells in an SRAM) can change as the supply voltage falls. The changed resistance impacts the ability to overdrive the memory cell for a write or to discharge the bit line for a read. Additionally, as the supply voltage decreases, the threshold voltage at which the transistors activate (or “turn on” . . . i.e. actively conduct current) does not scale well. Accordingly, the “trip point” (the point at which a write to a memory cell occurs) as a percentage of the supply voltage worsens as the supply voltage is decreased.